Digital ASIC
January 17, 2007 11:20 pmThis is what I have been busy with the whole of last week, making a Biquad filter chip at transistor level. It is a coursework in groups of four, however are group has only three people so more work! Not many Imperial undergraduate are taking the courses in final year anymore, less than 10 of us (~20%) I think in the whole course. Luckly our group work together happily and got the chip. Not the best chip in the world but we tried our best. Designing circuit at transistor level is a lot harder than VHDL and very time consuming. I was in charge of building a 32×8 ROM and here it is…
If you are interested, click on the image to see the rest of the components that we designed. 
