萬法唯心 – Impermanence

Archive for the 'Internship' category

Summer Internship is Over!

October 12, 2006 3:48 pm

My summer internship has finally ended with the presentation yesterday. The results is not bad, managed to write most of the drivers for the DE2 board in Handel-C and a manual too. Now that's done, can concentrate on other things including Uni stuff. Yesterday was the welcoming dinner for Ven. Master Chin Kung but couldn't go due to the presentation. Tonight is the first talk which is going to be on "Ethics and Education, the foundation of a harmonious life and spiritual cultivation. It think it's a very good idea and decision to bring traditional Chinese teachings and culture to the UK. Specially the Education, tonight's talk will be in Friends House, Euston, so will see how that goes.

There will be another talk tomorrow (13th Oct 06) on "From inner Peace to World Peace" by Ven. master Chin Kung himself, if you are interested please visit http://amtb.org.uk/. From what I know the second talk is doing quite well, almost all seats are gone. Will be uploading some photos later this week when I'm more free :).

Work Update…

September 11, 2006 10:25 pm

Have been very busy with a lot of things, including the intership… I spent the whole of last week just trying to write the Handel-C driver for reading and writing to the Flash RAM and the SRAM on the DE2 board. And also displaying using that to display a image to the screen using only 800×600 resolution. Didn't throught it will be that hard, but a lot of small things just wouldn't work and having to go a very long way to find out how to do it, which I guess happen all the time in projects. lol Here are some photos of the VGA output when I was trying to output a 8bit greyscale photo to the screen.

DE2 VGA output DE2 VGA output DE2 VGA output

So… not that easy… and after the whole week I did manage to get the photo display correctly! But it's only a greyscale image, the problem is all the RAMs on the board are only up to 16 bits wide and loading the image on to the RAM was also a challenge. Three more weeks to go, and my aim is to be able to display a colour image, video scream a camera input and write up a manual. Hopefully will get a colour image to display by the end of tomorrow :D.

Making some progress at work

August 25, 2006 12:40 am

Haven't have a update for the internship for quite a while so here we go. Today after talking to the Nigara guy, I start to work hard and got some results. I started writing the Handel-C library (drivers) for the DE2 board last week and I was able to display some text on the LCD module, controlling the LEDs and getting some data form a PS/2 mouse. The part that I find really hard is to display somethign on a monitor using the VGA out. So today I started off with getting a LCD monitor. After setting everything up, start to program… no clear directions, just trying… And at the end, I was able to display some colour on the screen, well some nice colour pattern with some simple code. Here are some photos of my new workspace, LCD & 7 Segment display and the nice colour pattern output.

My workspace  7 Sement display and LCD Colour Pattern

Click on the images above to see more photos. The longer I spent doing this, I start to really enjoy working on this project :D.

Altera DE2 & Handel-C link error

August 11, 2006 11:49 am

Spent the whole of yesterday to try and fix one error. What I am doing is using to build a Handel-C project (in Celoxica DK) to create a .edf output file for the Quartus. Then using Quartus to load this design on to the DE2 board. Interface with the VHDL module works fine, but when I try to assign a input say x=0b1010 to the VHDL module, for some reason the Quartus would not recognise this input. Search everywhere I can on the internet and couldn't find a solution. At the end of the day with some luck find out how to fix it. Here is why just in case you are having the same problem as me.

In DK, the .edf file created uses VCC as the default power. However Altera Quartus expect VDD instead, hence giving the following warning when the project is being compiled.

Warning: Net "VCC" has no sources.  Ignoring net during synthesis.

Solution: Go to  Assignments>Design Entry/Synthesis, change tool name to custom and add the library mapping file installed in DK/Lmf/celoxica.lmf

Vincent 

Altera DE2 Resources

August 9, 2006 4:52 pm

Well, still working on the DE2 board. Have been making some progress since last week. At the moment, got a few VHDL modules working and started to program the board in Handel-C. Started off with simple program on Handel-C just to turn on some LEDs with the switch, now trying to port a VHDL LCD module in Handel-C. Got it to display something, well all zeros…

If you happen to be working on the DE2 board as well, you might also be looking for more examples in VHDL and Verilog. Here are some sites which I find very useful, hope you find them useful too:

Visiting Altera

August 3, 2006 12:23 am

I have to say, the time in 九華山 was very relaxing, clam and 精進. As soon as I got home, start to have a lot of things going on again. A good chance to practice mindfulness. About the internship, enjoying it, quite relaxing and fun. Have about 9 more weeks on this research and today I went to Altera office at Buckinghamshire for a training day which was also quite fun. Get to find out more about FPGAs and what they are capable of doing.

Engineerings are really relax like Kamil says, table football, table tennis… Have to get the work done, but the time managment is up to you. Don't really have time to write much, when I get a chance will upload some photos for 九華山 and the group project.

Kamil wrote a very long blog on Engineering London today, quite interesting, have fun reading.